SIGNAL DELAY CIRCUIT

专利名称：SIGNAL DELAY CIRCUIT发明人：KOTANI KAZUYOSHI,MIURA

KUNIAKI,FUKUSHIMA ISAO,FUNASHIROHIDEKAZU

申请号：JP1420685申请日：19850130公开号：JPS61174809A公开日：19860806

摘要：PURPOSE:To separate the output of a comb line filter and that of a one-horizontal period (1H) delay line from each other by taking out two kinds of output of aglass delay line independently of each other. CONSTITUTION:An input signal (a) isconverted from an electrical signal to physical oscillation by an input converter 1 and ispropagated in a glass delay line 3 and is converted to an electrical signal again by anoutput converter 2. This signal is added to the input signal (a) by an adding resistance 4,and outputs (b) and (c) are obtained from two positions. That is, a delay circuit 9 fromwhich one output is taken out as the comb line filter output (c) by adding the input (a) inthe adding resistance 4 and the other is taken out as the delay output (b) is obtained.

申请人：HITACHI LTD

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